Bit instructions: NO operators, NC operators, negation, output, connector, RS flipflop, SR memory, recording of positive/negative signal edge
Conversion functions: Conversion of 16-bit integers into 32-bit integers
Comparison functions: 16/32-bit integers
Timer functions: Pulse timer, ON delay, OFF delay, each with an accuracy of 10 µs
Counter functions: 16 bit up, 16 bit down, 32 bit up/down
Other functions: Frequency generator, frequency scaler, bit shift registers, pulse-width modulation
Mathematical functions: Add, subtract, multiplication, division, absolute value for 16 and 32 bit
Actual value query: Query of the actual values for
Incremental encoders with 24 V signal voltage or
Incremental encoders with 5 V signal voltage (RS 422) or
SSI absolute encoders.
Counter functions for incremental encoders
Continuous counting
Individual counting
Periodic counting
16-bit or 32-bit value range
Integrated 24 V power supply for position encoder
Selectable times for DE-filter: 0, 5, 10, 15, 20, 50 µs and 1.5 ms
Mode of operation
Creating an FM 352-5 program with STEP 7 in LAD or FBD.
Implementation of simulations and tests on an S7-CPU or with the PLCSIM software simulation.
Compiling an FM 352-5 program in destination code for the FM 352-5.
Download the data directly to the module, either directly through the S7-CPU or using an MMC card.
In RUN position: The FPGA processed the program in a cycle of 1 µs duration.
Data exchange with the CPU is carried out via the 16-byte I/O interface.
Parameter settings
Parameters are assigned with STEP 7 or COM PROFIBUS and standardized *.GSE files. In order to accelerate the switch-on procedure, the *.GSE file is already operable.
